View CXA2074QS_2022033.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

?1 cxa2074q/s e96843b86 us audio multiplexing decoder description the cxa2074q/s is an ic designed as a decoder for the zenith tv multi-channel system and also corresponds with i 2 c bus. functions include stereo demodulation, sap (separate audio program) demodulation, dbx noise reduction and sound processor. various kinds of filters are built in while adjustment, mode control and sound processor control are all executed through i 2 c bus. features audio multiplexing decoder, dbx noise reduction decoder and sound processor are all included in a single chip. almost any sort of signal processing is possible through this ic. all adjustments are possible through i 2 c bus to allow for automatic adjustment. various built-in filter circuits greatly reduce external parts. there are three systems for inputs and two systems for outputs, and each mode control is possible. standard i/o level [( ) is the pin no. for the cxa2074s.] input level compin (pin 17) 245mvrms aux1-l/r (pins 36 and 35) 490mvrms aux2-l/r (pins 38 and 37) 490mvrms output level lpout-l/r (pins 40 and 39) 490mvrms lsout-l/r (pins 8 and 7) 490mvrms absolute maximum ratings (ta = 25?) supply voltage v cc 11 v operating temperature topr ?0 to +75 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 0.6 (48 pin qfp) w 2.2 (42 pin sdip) w range of operating supply voltage 9 0.5 v applications tv, vcr and other decoding systems for us audio multiplexing tv broadcasting structure bipolar silicon monolithic ic * a license of the dbx-tv noise reduction system is required for the use of this device. sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. cxa2074q 48 pin qfp (plastic) cxa2074s 42 pin sdip (plastic)
? 2 cxa2074q/s a u x 1 - l a u x 1 - r v c a w g t v c a t c v c a i n v e o u t v e w g t v e s a p i n s a p o u t s t i n s u b o u t v c c v e t c n o i s e t c t r e r t r e l s d a s c l d g n d m a i n i n m a i n o u t p c i n t 2 p l i n t c o m p i n v g r i r e f g n d s a p t c p c i n t 1 b a s s r 1 b a s s r 2 b a s s l 1 b a s s l 2 l s o u t - r l s o u t - l l p i n - l l p i n - r l p o u t - l a u x 2 - l a u x 2 - r l p o u t - r 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 pin configuration (top view) cxa2074q cxa2074s 2 5 2 6 2 7 2 8 2 9 3 0 3 6 3 5 3 4 3 1 3 2 3 3 a u x 1 - l a u x 1 - r n c v c a w g t v c a t c v c a i n v e o u t n c v e t c v e w g t v e s a p i n 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 t r e l l s o u t - r l s o u t - l s c l d g n d n c p c i n t 2 n c m a i n o u t m a i n i n s d a p c i n t 1 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 p l i n t c o m p i n i r e f g n d s a p t c n c s t i n n o i s e t c v g r v c c s a p o u t s u b o u t 4 0 3 9 3 8 3 7 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 t r e r b a s s l 2 b a s s l 1 b a s s r 2 l p o u t - l b a s s r 1 l p i n - l l p i n - r l p o u t - r a u x 2 - l a u x 2 - r n c
? 3 cxa2074q/s block diagram cxa2074q v g r i r e f d g n d s c l s d a s a p o u t s a p i n s t i n v e v e w g t v e t c v e o u t v c a i n v c a w g t v c a t c m a i n i n m a i n o u t s u b o u t p l i n t p c i n t 1 c o m p i n v c c g n d n o i s e t c s a p t c a u x 2 - l i r e f s w l p f l p f h p f r m s d e t r m s d e t v c a v e d e e m l o g i c m a t r i x v c a l p f l p f 1 / 2 1 / 4 v c o l f l t s t l p f " f i l t e r " v c a l p f b p f s a p v c o l p f n o i s e d e t s a p i n d " p o n r e s " s t i n d " s a p " " n o i s e " v c o n r s w / f o m o / s a p c w i d e b a n d s p e c t r a l " s t e r e o " d e e m f l t a m p ( + 4 d b ) i 2 c b u s i / f ( + 6 d b ) l s o u t - l l s o u t - r m 2 t r e b l e t r e b t r e b b a s s p a s s s w b a s s b a s s a u x 1 - r a u x 1 - l a u x 2 - r b a s s l 1 b a s s l 2 b a s s r 1 b a s s r 2 f i l t e r p c i n t 2 v o l - r v o l - l v o l - l t v s w l p i n - l l p i n - r l p o u t - l l p o u t - r f e x t 2 f e x t 1 t v s w / e x t / m 1 t r e l t r e r v o l - r 3 6 3 5 3 8 3 7 4 0 3 9 4 2 4 1 a t t 2 3 3 2 3 3 3 1 3 0 2 8 2 7 2 6 4 8 1 4 5 4 4 4 7 4 6 8 9 2 1 1 3 1 2 1 1 1 4 1 9 1 7 2 3 1 8 1 5 1 6 6 5 4 2 4 2 5 2 2 p s w
v g r i r e f d g n d s c l s d a s a p o u t s a p i n s t i n v e v e w g t v e t c v e o u t v c a i n v c a w g t v c a t c m a i n i n m a i n o u t s u b o u t p l i n t p c i n t 1 c o m p i n v c c g n d n o i s e t c s a p t c a u x 2 - l h p f r m s d e t 1 / 2 1 / 4 v c o l f l t " f i l t e r " " p o n r e s " " s a p " " n o i s e " n r s w / f o m o / s a p c w i d e b a n d s p e c t r a l " s t e r e o " ( + 6 d b ) l s o u t - l l s o u t - r m 2 t r e b l e t r e b t r e b b a s s b a s s b a s s a u x 1 - r a u x 1 - l a u x 2 - r b a s s l 1 b a s s l 2 b a s s r 1 b a s s r 2 p c i n t 2 v o l - r v o l - l v o l - l i r e f s w l p f l p f r m s d e t v c a v e d e e m l o g i c m a t r i x v c a l p f l p f s t l p f v c a l p f b p f s a p v c o l p f n o i s e d e t s a p i n d s t i n d v c o d e e m f l t a m p ( + 4 d b ) i 2 c b u s i / f p a s s s w f i l t e r t v s w l p i n - l l p i n - r l p o u t - l l p o u t - r f e x t 2 f e x t 1 t v s w / e x t / m 1 t r e l t r e r v o l - r 3 4 1 2 8 7 a t t 6 5 3 3 3 2 3 4 3 1 3 0 2 9 2 8 2 4 2 7 2 6 1 8 1 9 1 1 1 0 9 1 4 1 5 1 6 2 3 1 3 1 2 3 6 3 5 1 7 2 2 2 0 2 5 2 1 3 8 3 7 3 9 4 2 4 1 4 0 p s w ? 4 cxa2074q/s cxa2074s
? 5 cxa2074q/s bassr1 bassr2 bassl1 bassl2 trer trel lsout-r lsout-l 4.0v 4.0v 4.0v 4.0v 4.0v 4.0v 4.0v 4.0v bass filter pin. (right channel) (connect a 47nf capacitor between pins 1 and 2 (44 and 45).) the cutoff frequency is determined by the built-in resistor and the external capacitance. bass filter pin. (left channel) (connect a 47nf capacitor between pins 3 and 4 (46 and 47).) the cutoff frequency is determined by the built-in resistor and the external capacitance. treble filter pin. (right channel) (connect a 6.8nf capacitor between this pin and gnd.) treble filter pin. (left channel) (connect a 6.8nf capacitor between this pin and gnd.) lsout right channel output pin. lsout left channel output pin. 1 9 0 1 9 0 3 k 4 v v c c 4 . 2 k 3 . 4 k 2 . 7 k 2 . 2 k 1 . 8 k 1 . 4 k 1 . 2 k 4 . 9 k v c c 2 4 1 3 ( 4 5 ) ( 4 7 ) ( 4 4 ) ( 4 6 ) 5 8 0 5 8 0 3 k v c c 4 . 2 k 3 . 4 k 2 . 7 k 2 . 2 k 1 . 8 k 1 . 4 k 1 . 2 k 4 . 9 k v c c 5 6 ( 4 8 ) ( 1 ) 5 8 0 5 8 0 v c c v c c 3 k 7 8 ( 2 ) ( 3 ) 44 45 46 47 48 1 2 3 1 2 3 4 5 6 7 8 pin no. qfp sdip symbol pin voltage equivalent circuit description pin description
? 6 cxa2074q/s 4 5 6 8 9 9 10 11 12 13 sda scl dgnd mainin mainout 4.0v 4.0v serial data i/o pin. v ih > 0v v il < 1.5v serial clock input pin. v ih > 3.0v v il < 1.5v digital block gnd. input the (l + r) signal from mainout (pin 13 (9)). (l + r) signal output pin. 7 . 5 k 4 . 5 k 5 4 k 3 k 7 . 5 k v c c 3 5 2 . 1 v 2 9 ( 4 ) 7 . 5 k 3 5 2 . 1 v 1 0 . 5 k 4 4 k 3 k v c c 1 0 ( 5 ) 1 1 ( 6 ) v c c 1 4 7 1 0 k 5 3 k 4 v v c c 1 2 ( 8 ) v c c 1 4 7 1 k 1 5 k 2 0 0 v c c 4 1 3 ( 9 ) pin no. qfp sdip symbol pin voltage equivalent circuit description
? 7 cxa2074q/s 11 12 13 14 14 15 16 17 pcint1 pcint2 plint compin 4.0v 4.0v 5.1v 4.0v stereo block pll loop filter integrating pin. pilot cancel circuit loop filter integrating pin. (connect a 1 f capacitor between this pin and gnd.) audio multiplexing signal input pin. v c c 1 4 7 2 0 k 2 6 2 0 k 1 0 k 2 0 k 5 0 2 0 k 2 0 k 1 6 ( 1 3 ) v c c 2 2 k 3 v 2 0 k 4 k 4 k 4 k 1 6 k 2 4 k 5 0 k 1 4 7 3 k 1 7 ( 1 4 ) 2 2 k v c c 3 0 k 1 4 7 1 4 ( 1 1 ) 4 k v c c 2 1 0 k 1 0 k 2 k 1 4 7 1 5 ( 1 2 ) pin no. qfp sdip symbol pin voltage equivalent circuit description
? 8 cxa2074q/s 15 16 17 18 19 18 19 20 21 22 vgr iref gnd saptc v cc 1.3v 1.3v 4.5v band gap reference output pin. (connect a 10 f capacitor between this pin and gnd.) set the filter and vco reference current. the reference current is adjusted with the bus data based on the current which flows to this pin. (connect a 62k ( 1%) resistor between this pin and gnd.) analog block gnd. set the time constant for the sap carrier detection circuit. (connect a 4.7 f capacitor between this pin and gnd.) supply voltage pin. 8 k 4 k 3 k 1 0 k v c c 5 0 1 k v c c 2 1 ( 1 8 ) 2 2 ( 1 9 ) 2 0 ( 1 7 ) 4 0 k 4 0 k 3 0 k 3 0 p 1 . 8 k 1 6 k 6 . 3 k 1 4 7 3 0 k 1 5 k 3 0 k v c c 2 v c c 1 9 ( 1 6 ) 4 1 1 k 9 . 7 k 1 9 . 4 k 2 . 0 6 k 3 k 1 4 7 v c c 1 1 k 1 1 k 1 8 ( 1 5 ) pin no. qfp sdip symbol pin voltage equivalent circuit description
? 9 cxa2074q/s 2 k 2 k 2 k 4 k 1 k 1 4 7 5 8 0 1 4 . 4 k 5 8 0 4 k 1 0 p 2 k 2 k v c c 2 3 ( 2 1 ) 21 22 25 23 24 23 24 27 25 26 subout stin sapin noisetc sapout 4.0v 4.0v 4.0v 3.0v 4.0v (l ?r) signal output pin. input the (l ?r) signal from subout (pin 23 (21)). input the (sap) signal from sapout (pin 26 (24)). set the time constant for the noise detection circuit. (connect a 4.7 f capacitor between this pin and gnd.) sap fm detector output pin. 2 3 k 1 4 7 1 8 k 2 0 k 1 1 . 7 k 2 3 k 4 v 1 4 7 1 8 k 4 v v c c 2 4 2 7 ( 2 2 ) ( 2 5 ) 3 k 3 k 3 . 3 k 4 k 4 v v c c 8 k 2 1 0 k 1 k 2 k v c c 2 5 2 0 0 k ( 2 3 ) 2 4 k 1 0 5 8 0 v c c 5 p 5 8 0 4 k 5 0 1 0 k 1 4 7 2 6 ( 2 4 ) pin no. qfp sdip symbol pin voltage equivalent circuit description
? 10 cxa2074q/s 26 27 28 30 28 29 30 31 ve vewgt vetc veout 4.0v 4.0v 1.7v 4.0v variable de-emphasis integrating pin. (connect a 2700pf capacitor and a 3.3k resistor in series between this pin and gnd.) weight the variable de-emphasis control effective value detection circuit. (connect a 0.047 f capacitor and a 3k resistor in series between this pin and gnd.) determine the restoration time constant of the variable de-emphasis control effective value detection circuit. (the specified restoration time constant can be obtained by connecting a 3.3 f capacitor between this pin and gnd.) variable de-emphasis output pin. (connect a 4.7 f non-polar capacitor between pins 31 (30) and 32 (31).) v c c 4 v 3 6 k 2 . 9 v 5 8 0 1 4 7 5 8 0 8 k 3 0 k 8 4 k 5 0 2 9 ( 2 7 ) 2 0 k 7 . 5 4 k 5 0 v c c 4 4 3 0 ( 2 8 ) v c c 1 0 k 5 8 0 5 8 0 5 p 3 1 ( 3 0 ) 7 . 5 k 1 4 7 v c c 2 8 ( 2 6 ) pin no. qfp sdip symbol pin voltage equivalent circuit description
? 11 cxa2074q/s 31 32 33 35 36 37 38 32 33 34 35 36 37 38 vcain vcatc vcawgt aux1-r aux1-l aux2-r aux2-l 4.0v 1.7v 4.0v 4.0v 4.0v 4.0v 4.0v vca input pin. input the variable de-emphasis output signal from pin 31 (30) via a coupling capacitor. determine the restoration time constant of the vca control effective value detection circuit. (the specified restoration time constant can be obtained by connecting a 10 f capacitor between this pin and gnd.) weight the vca control effective value detection circuit. (connect a 1 f capacitor and a 3.9k resistor in series between this pin and gnd.) right channel external input 1 pin. left channel external input 1 pin. right channel external input 2 pin. left channel external input 2 pin. 4 k v c c 3 0 k 8 k 3 6 k 2 . 9 v 3 p 5 8 0 5 8 0 1 4 7 4 0 k 4 0 k 5 0 8 3 4 ( 3 3 ) 5 0 v c c 4 k 2 0 k 4 4 7 . 5 3 3 ( 3 2 ) v c c 2 0 k v c c 4 7 k 4 7 k 3 2 ( 3 1 ) v c c 4 v 2 7 . 5 k 4 7 k 1 4 7 1 0 k 3 5 3 6 3 7 3 8 pin no. qfp sdip symbol pin voltage equivalent circuit description
? 12 cxa2074q/s 39 40 41 42 7 10 20 29 34 43 39 40 41 42 lpout-r lpout-l lpin-r lpin-l nc nc nc nc nc nc 4.0v 4.0v 4.0v 4.0v lpout right channel output pin. lpout left channel output pin. right channel loop input pin. left channel loop input pin. v c c 4 v 4 7 k 1 4 7 1 0 k 4 1 4 2 3 k 5 8 0 5 8 0 v c c 3 9 4 0 1 4 7 pin no. qfp sdip symbol pin voltage equivalent circuit description (7) (10) (20) (29) (34) (43)
? 13 cxa2074q/s electrical characteristics compin input level (100% modulation level) the pin numbers in parenthesis are for the cxa2074q. (ta = 25 c, v cc = 9v) main (l + r) (pre-emphasis: off) = 245mvrms sub (l ?r) (dbx-tv: off) = 490mvrms pilot = 49mvrms sap carrier = 147mvrms f h = 15.734khz item current consumption main output level main de-emphasis frequency characteristic main lpf frequency characteristic main distortion main overload distortion main s/n sub output level sub lpf frequency characteristic sub distortion sub overload distortion sub s/n st ? sap crosstalk sub pilot leak stereo on level stereo on/off hysteresis no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 signal icc vmain fcdeem fcmain thdm thdmmax snmain vsub fcsub thdsub thdsmax snsub ctst pcsub thst hyst mode mono mono mono mono mono mono st st st st st sap st st input pin 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) min. 30 440 ?.2 ?.0 61 150 ?.0 56 60 ?.0 3.5 typ. 40 490 0 ?.0 0.1 0.15 69 190 ?.5 0.1 0.2 64 70 ?5 ?.0 6.0 max. 50 540 1.0 1.0 0.5 0.5 230 1.0 1.0 2.0 ?7 ?.0 8.5 unit ma mvrms db db % % db mvrms db % % db db db db db input signal no signal mono 1khz 100% mod. pre-em. on mono 5khz 30% mod. pre-em. on mono 12khz 30% mod. pre-em. on mono 1khz 100% mod. pre-em. on mono 1khz 200% mod. pre-em. off mono 1khz, pre-em. on sub (l-r), 1khz, 100% mod., nr off sub (l-r) 12khz, 30% mod., nr off sub (l-r) 1khz, 100% mod., nr off sub (l-r), 1khz, 200% mod., nr off sub (l-r) 1khz, nr off sub (l-r), 1khz, 100% mod., nr on, sap carrier (5f h ) pilot (f h ) 0db change pilot (f h ) level measurement conditions 20 log ('5k'/'1k') 20 log ('12k'/'1k') 20 log ('100%'/'0%') 20 log ('12k'/'1k') 20 log ('100%'/'0%') 20 log ('nrsw = 0'/ 'nrsw = 1') 0db = 49mvrms 0db = 49mvrms 20 log (?n level'/'off level') filter 15klpf 15klpf 15klpf 15klpf 15klpf 15klpf 1kbpf f h bpf output pin 39/40 39/40 39/40 39/40 39/40 39/40 23 (21) 23 (21) 23 (21) 23 (21) 23 (21) 40 23 (21) bus return
? 14 cxa2074q/s no. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 item sap output level sap lpf frequency characteristic sap distortion sap s/n sap ? st cross talk sap on level sap on/off hysteresis st separation 1 l ? r st separation 1 r ? l st separation 2 l ? r st separation 2 r ? l lpout output level lpout muted amount lsout output level lsout cross talk lsout muted amount symbol vsap fcsap thdsap snsap ctsap thsap hysap stlsep1 strsep1 stlsep2 strsep2 vtp mulp1 mulp2 vls ctls muls mode sap sap sap sap st sap st st st st ext int ext int ext int ext ext input pin 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 17 (14) 35/36 37/38 17 (14) 35/36 37/38 17 (14) 35/36 37/38 35/36 37/38 17 (14) 35/36 37/38 min. 150 ?.0 46 60 ?2.0 2.0 23 23 23 23 ?.5 ?.9 typ. 190 0 2.5 55 70 ?.0 4.0 35 35 35 35 0 ?5 ?0 0 ?5 ?0 ?0 max. 230 2.5 6.0 ?.5 6.0 0.5 ?0 ?5 0.9 ?0 ?0 ?5 unit mvrms db % db db db db db db db db db db db db db db db input signal sap 1khz 100% mod. nr off sap 10khz, 30% mod . nr off sap 1khz 100% mod . nr off sap 1khz, nr off sap 1khz 100% mod. nr on, pilot (f h ) change sap carrier (5f h ) level st-l 300hz 30% mod . nr on st-r 300hz 30% mod . nr on st-l 3khz 30% mod . nr on st-r 3khz 30% mod . nr on sine wave 1khz, 490mvrms mono 1khz, 100%, pre-em. on sine wave 1khz, 490mvrms mono 1khz 100%, pre-em. on sine wave 1khz, 490mvrms sine wave 1khz, 490mvrms mono 1khz 100%, pre-em. on sine wave 1khz, 490mvrms measurement conditions 20 log ('10k'/'1k') 20 log ('100%'/'0%') 20 log ('nrsw = 1'/'nrsw = 0') 0db = 147mvrms 20 log (?n level??ff level? 0db = 490mvrm s 20 log (m1 = "0"/m1 = "1") 20 log (m1 = "0"/m1 = "1") 0db = 490mvrms 0db = 490mvrms 0db = 490mvrms ext ? int 0db=490mvrms int ? ext 20 log (m2 = "0"/m2 = "1") filter 15klpf 15klpf 1kbpf 15klpf 15klpf 15klpf 15klpf 1kbpf 1kbpf 1kbpf 1kbpf output pin 26 (24) 26 (24) 26 (24) 26 (24) 40 bus return 39/40 39/40 39/40 39/40 39/40 39/40 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3)
? 15 cxa2074q/s no. 34 35 36 37 38 39 40 41 42 item lsout dc offset lsout distortion lsout s/n lsout overload distortion bass maximum value bass minimum value treble maximum value treble minimum value volume minimum value symbol osls thdls snls thdlsmax tbmax tbmin ttmax ttmin volmin mode int ext ext ext ext ext ext ext ext ext input pin 35/36 37/38 35/36 37/38 35/36 37/38 35/36 37/38 35/36 37/38 35/36 37/38 35/36 37/38 35/36 37/38 min. ?5 75 11 ?3 11 ?3 typ. 0 0.01 88 0.1 12 ?2 12 ?2 ?0 max. 25 0.5 1.0 13 ?1 13 ?1 ?5 unit mv % db % db db db db db input signal no signal sine wave 1khz, 490mvrms sine wave 1khz, 490mvrms sine wave 1khz, 2vrms sine wave 100hz, 245mvrms sine wave 100hz, 245mvrms sine wave 10khz, 245mvrms sine wave 10khz, 245mvrms sine wave 1khz, 490mvrms measurement conditions mute (m2 = 0)/ dc difference when there is no signal 20 log ('490mvrms'/ 'no signal') bass = "f" 0db = 245mvrms bass = "0" 0db = 245mvrms treble = "f" 0db = 245mvrms treble = "0" 0db = 245mvrms vol-l = "0", vol-r = "0" 0db = 490mvrms filter 15klpf 15klpf 15klpf 1kbpf output pin 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3) 7/8 (2/3)
? 16 cxa2074q/s i 2 c bus block items (sda, scl) i 2 c bus load conditions: pull-up resistor 4k (connect to +5v) load capacity 200pf (connect to gnd) i 2 c bus control signal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 high level input voltage low level input voltage high level input current low level input current low level output voltage sda (pin 9) during 3ma inflow maximum inflow current input capacitance maximum clock frequency minimum waiting time for data change minimum waiting time for start of data transfer low level clock pulse width high level clock pulse width minimum waiting time for start preparation minimum data hold time minimum data preparation time rise time fall time minimum waiting time for stop preparation v ih v il i ih i il v ol i ol c i f scl t buf t hd : sta t low t high t su : sta t hd : dat t su : dat t r t f t su : sto 3.0 0 0 3 0 4.7 4.0 4.7 4.0 4.7 0 250 4.7 5.0 1.5 10 10 0.4 10 100 1 300 v a v ma pf khz s ns s ns s s d a s c l t b u f p s t h d : s t a t l o w t h d : d a t t h i g h t r t f t h d : s t a t s u : s t a s r t s u : s t o p t s u : d a t no. item symbol min. typ. max. unit
? 17 cxa2074q/s electrical characteristics measurement circuit cxa2074q m e a s u r e s f i l t e r s 1 5 k h z l p f f h b p f 1 k h z b p f i 2 c b u s d a t a s 6 s 5 s 4 s 3 s 2 s 1 b u f f r 6 3 . 3 k r 4 3 k c 1 9 2 7 0 0 p c 1 8 0 . 0 4 7 2 5 2 6 2 7 2 8 2 9 3 0 3 6 3 5 3 4 3 1 3 2 3 3 a u x 1 - l a u x 1 - r n c v c a w g t v c a t c v c a i n v e o u t n c v e t c v e w g t v e s a p i n 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 t r e l l s o u t - r l s o u t - l s c l d g n d n c p c i n t 2 n c m a i n o u t m a i n i n s d a p c i n t 1 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 p l i n t c o m p i n i r e f g n d s a p t c n c s t i n n o i s e t c v g r v c c s a p o u t s u b o u t 4 0 3 9 3 8 3 7 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 t r e r b a s s l 2 b a s s l 1 b a s s r 2 l p o u t - l b a s s r 1 l p i n - l l p i n - r l p o u t - r a u x 2 - l a u x 2 - r n c c 1 7 3 . 3 t a n t a l u m c 1 5 4 . 7 c 1 4 1 0 t a n t a l u m r 1 3 . 9 k c 1 3 1 c 1 2 4 . 7 c 1 0 4 . 7 s i g n a l g e n e - r a t o r v 6 a c v 5 a c v 4 a c v 2 a c s i g n a l g e n e - r a t o r s i g n a l g e n e - r a t o r s i g n a l g e n e - r a t o r c 8 4 7 n v 3 a c s i g n a l g e n e r a t o r c 1 6 . 8 n c 2 4 . 7 c 3 4 . 7 c 4 4 . 7 c 5 4 . 7 c 6 4 . 7 c 7 4 . 7 v 1 a c s i g n a l g e n e r a t o r c 9 4 7 n c 1 1 6 . 8 n c 1 6 4 . 7 r 2 2 2 0 r 3 2 2 0 r 7 1 m e g c 2 0 5 6 0 0 p r 5 1 0 0 k c 2 1 0 . 0 1 2 d g n d c 2 9 4 . 7 c 2 6 4 . 7 g n d v 7 a c s i g n a l g e n e r a t o r g n d g n d c 2 7 1 c 2 5 1 0 r 8 6 2 k m e t a l 1 % c 2 4 4 . 7 c 2 3 1 0 0 v 8 9 v v c c c 2 2 4 . 7 c 2 8 4 . 7
? 18 cxa2074q/s cxa2074s i 2 c b u s d a t a d g n d s i g n a l g e n e r a t o r g n d v 7 a c r 2 3 . 9 k c 1 6 1 0 t a n t a l u m r 5 3 k s 1 s 2 s 3 s 4 b u f f f i l t e r s m e a s u r e s 1 5 k h z l p f f h b p f 1 k h z b p f s 5 s 6 v 1 a c s i g n a l g e n e r a t o r s i g n a l g e n e r a t o r 5 6 7 8 9 1 0 1 2 1 3 1 5 1 6 1 7 1 8 2 1 2 2 2 5 2 7 2 8 2 9 4 0 3 9 3 4 3 1 3 2 3 3 4 2 c 1 4 . 7 c 2 1 0 . 0 4 7 c 1 7 4 . 7 c 3 1 1 0 0 c 3 0 4 . 7 c 2 7 1 0 c 2 6 4 . 7 c 2 4 1 r 3 2 2 0 r 1 2 2 0 c 1 3 4 . 7 c 1 1 4 . 7 c 9 6 . 8 n c 7 6 . 8 n 2 0 r 8 6 2 k m e t a l 1 % 1 4 r 6 1 m e g c 2 0 5 6 0 0 p r 4 1 0 0 k c 2 2 0 . 0 1 2 b a s s r 1 b a s s r 2 b a s s l 1 b a s s l 2 l s o u t - r l s o u t - l t r e r t r e l s d a s c l d g n d m a i n i n m a i n o u t p c i n t 1 p c i n t 2 p l i n t c o m p i n v g r i r e f g n d s a p t c l p i n - l l p i n - r l p o u t - l l p o u t - r a u x 2 - l a u x 2 - r a u x 1 - l a u x 1 - r v c a w g t v c a t c v c a i n v e o u t v e t c v e w g t v e s a p i n s a p o u t n o i s e t c s t i n s u b o u t v c c c 1 8 4 . 7 1 1 c 5 4 7 n c 2 4 7 n 2 3 4 1 v 2 a c c 3 4 . 7 4 1 s i g n a l g e n e r a t o r s i g n a l g e n e r a t o r v 3 a c c 8 4 . 7 v 4 a c c 1 0 4 . 7 s i g n a l g e n e r a t o r v 5 a c c 1 2 4 . 7 v 6 a c c 1 4 4 . 7 s i g n a l g e n e r a t o r 3 8 3 7 3 6 3 5 c 6 4 . 7 c 4 4 . 7 c 1 5 1 3 0 c 1 9 3 . 3 t a n t a l u m r 7 3 . 3 k c 2 3 2 7 0 0 p 2 6 c 2 5 4 . 7 c 2 8 4 . 7 2 4 c 2 9 4 . 7 g n d g n d v 8 9 v v c c 2 3 1 9
? 19 cxa2074q/s i 2 c bus register data standard setting values att vco filter spectral wideband test-da test1 fst vol-l vol-r bass treble nrsw fomo tvsw ext fext1 fext2 psw m1 m2 attsw sapc 4 6 6 6 6 1 1 1 6 6 4 4 1 1 1 1 1 1 1 1 1 1 1 a a a a a t t t u u u u u u u u u u u u u s s 9 1f 1f 1f 1f 0 0 0 3f 3f 8 8 0 0 0 0 0 1 1 center point normal mode normal mode 3f = 0db 3f = 0db 7 or 8 = 0db 7 or 8 = 0db according to the mode control table tv decoder output selection external input 1 forced mono external input 2 forced mono tvsw output selection mute off fixed by the set specifications adjustment point standard setting value fst = 0 standard setting value standard setting value standard setting value standard setting value register number of bits classifi- cation standard setting contents setting value when electrical characteristics are measured classification a: adjustment u: user control s: proper to set t: test
? 20 cxa2074q/s list of adjustment contents the pin numbers in parenthesis are for the cxa2074q. 1 2 3 4 main vca st & sap vco st & sap & dbx filter low frequency st separation high frequency st separation att vco filter wideband spectral compin pin 17 (pin 14) none compin pin 17 (pin 14) compin pin 17 (pin 14) compin pin 17 (pin 14) 100hz 245mvrms none 9.4khz 600mvrms st-l 30% 300hz st-l 30% 3khz lpout-l output level lpout-r output frequency sta5 (filadj) lpout-r output level lpout-r output level adjust as close to 490mvrms as possible adjust as close to 62.936khz as possible adjust to the center of the filadj = 1 condition minimize the output level minimize the output level test-da = 1 test1 = 1 adjustment item adjustment data input pin input signal data measurement adjustment contents test mode setting
? 21 cxa2074q/s adjustment method ( adjust this ic through tuner and if when this ic is mounted on the set. ) 1. att adjustment 1) test bit is set to ?est1 = 0?and ?est-da = 0? 2) input a 100hz, 245mvrms sine wave signal to compin and monitor the lpout-l output level. then, adjust the ?tt?data for att adjustment so that the lpout-l output goes to the standard value (490mvrms). 3) adjustment range: 30% adjustment bits: 4 bits 2. stereo, sapvco adjustment 1) test bit is set to ?est1 = 0?and ?est-da = 1? 2) monitor the lpout-r output (4f h free running) frequency in a no input state, and adjust ?co adjustment data so that this frequency is as close to 4f h (62.936khz) as possible. 3) adjustment range: 20% adjustment bits: 6 bits 3. stereo, sap block, dbx filter adjustment 1) test bit is set to ?est1 = 1?and ?est-da = 0? 2) input a 9.4khz, 600mvrms sine wave signal to compin. while monitoring the status flag (sta5) condition, adjust the ?ilter?adjustment data. 3) adjustment range: 20% adjustment bits: 6 bits align ?ilter?with the center of the sta5 = 1 (adjustment ok) condition range. 4. separation adjustment 1) test bit is set to ?est1 = 0?and ?est-da = 0? 2) set the unit to stereo mode and input the left channel only signal (modulation factor 30%, frequency 300hz nr-on) to compin. at this time, adjust the ?ideband?adjustment data to reduce lpout-r output to the minimum. 3) next, set the frequency only of the input signal to 3khz and adjust the ?pectral?adjustment data to reduce lpout-r output to the minimum. 4) the adjustments in 2 and 3 above are performed to optimize the separation. 5) ?ideband ?pectral adjustment range: 30% adjustment range: 15% adjustment bits: 6 bits adjustment bits: 6 bits a d j u s t m e n t p o i n t 0 3 f 1 c o n t r o l d a t a " f i l t e r " m e a s u r e m e n t d a t a s t a 5 " f i l a d j " 0
? 22 cxa2074q/s description of operation [the pin numbers in parenthesis are for the cxa2074q.] the us audio multiplexing system possesses the base band spectrum shown in fig. 1. fig. 1. base band spectrum fig. 2. overall block diagram (see fig. 3 for the dbx-tv block) fig 3. dbx-tv block p e a k d e v k h z 5 0 2 5 2 5 l + r 5 0 1 5 k h z l - r d b x - t v n r 5 0 a m - d s b - s c s a p d b x - t v n r f m 1 0 k h z 5 0 1 0 k h z t e l e m e t r y f m 3 k h z 1 5 f h = 1 5 . 7 3 4 k h z f h 2 f h 3 f h 4 f h 5 f h 6 f h 6 . 5 f h f 5 p i l o t 3 ( c o m p i n ) s t e r e o l p f p l l ( v c o 8 f h ) 2 f h l 0 f h l 9 0 f h l 0 m o d e c o n t r o l p i l o t d e t m v c a p i l o t c a n c e l m a i n l p f d e . e m ( m a i n o u t ) l + r 4 . 7 ( m a i n i n ) l - r ( d s b ) d e t i n j . l o c k s u b v c a s u b l p f w i d e b a n d ( s u b o u t ) ( s t i n ) 4 . 7 n r s w d b x - t v b l o c k m a t r i x ( l c h ) ( r c h ) m o d e c o n t r o l ( s a p i n ) 4 . 7 s a p ( f m ) d e t s a p l p f m o d e c o n t r o l s a p b p f ( s a p o u t ) l r t o t v s w n o i s e d e t i 2 c b u s d e c o d e r s a p d e t 1 7 1 3 1 2 2 3 2 4 2 6 2 7 a b i 2 c b u s d e c o d e r i 2 c b u s d e c o d e r ( 1 4 ) ( 9 ) ( 8 ) ( 2 1 ) ( 2 2 ) ( 2 5 ) ( 2 4 ) n r s w f i x e d d e e m p h a s i s v a r i a b l e d e e m p h a s i s ( v e o u t ) ( v c a i n ) t o m a t r i x 4 . 7 h p f l p f l p f r m s d e t r m s d e t v c a 2 4 2 7 3 2 a b 3 1 ( s t i n ) ( s a p i n ) ( 2 2 ) ( 2 5 ) ( 3 0 ) ( 3 1 )
? 23 cxa2074q/s fig. 4. sound processor block (1) l + r (main) after the audio multiplexing signal input from compin (pin 17 (pin 14)) passes through mvca, the sap signal and telemetry signal are suppressed by stereo lpf. next, the pilot signals are canceled. finally, the l ?r signal and sap signal are removed by main lpf, and frequency characteristics are flattened (de-emphasized) and input to the matrix. (2) l ?r (sub) the l ?r signal follows the same course as l + r before the pilot signal is canceled. l ?r has no carrier signal, as it is a suppressed-carrier double-sideband amplitude modulated signal (dsb-am modulated). for this reason, the pilot signal is used to regenerate the carrier signal (quasi-sine wave) to be used for the demodulation of the l ?r signal. in the last stage, the residual high frequency components are removed by sub lpf and the l ?r signal is input to the dbx-tv block via the nrsw circuit after passing through subvca. (3) sap sap is an fm signal using 5f h as a carrier as shown in the fig. 1. first, the sap signal only is extracted using sap bpf. then, this is subjected to fm detection. finally, residual high frequency components are removed and frequency characteristics flattened using sap lpf, and the sap signal is input to the dbx-tv block via the nrsw circuit. when there is no sap signal, the pin 26 output is soft muted. (4) mode discrimination stereo discrimination is performed by detecting the pilot signal amplitude. sap discrimination is performed by detecting the 5f h carrier amplitude. noise discrimination is performed by detecting the noise near 25khz after fm detection of sap signal. (5) dbx-tv block either the l ?r signal or sap signal input respectively from st in (pin 24 (pin 22)) or sap in (pin 27 (pin 25)) is selected by the mode control and input to the dbx-tv block. the input signal then passes through the fixed de-emphasis circuit and is applied to the variable de- emphasis circuit. the signal output from the variable de-emphasis circuit passes through an external capacitor and is applied to vca (voltage control amplifier). finally, the vca output is converted from a current to a voltage using an operational amplifier and then input to the matrix. ( l c h ) ( r c h ) ( a u x 1 - l ) ( a u x 1 - r ) f r o m m a t r i x ( l p i n - l ) p a s s s w b a s s t r e b l e ( l s o u t - l ) ( l s o u t - r ) 4 0 3 9 4 1 4 2 ( l p i n - r ) ( l p o u t - l ) ( l p o u t - r ) t v s w ( a u x 2 - l ) ( a u x 2 - r ) 3 7 3 8 3 6 3 5 v o l - l v o l - r 7 8 ( 3 ) ( 2 )
? 24 cxa2074q/s the variable de-emphasis circuit transmittance and vca gain are respectively controlled by each of effective value detection circuits. each of the effective value detection circuits passes the input signal through a predetermined filter for weighting before the effective value of the weighted signal is detected to provide the control signal. (6) matrix, tvsw, passsw the signals (l + r, l ?r, sap) input to ?atrix?become the outputs for the st-l, st-r, mono and sap signals according to the bus data and whether there is st / sap discrimination. ?vsw?switches the ?atrix?output signal, external input signal (input to aux1-l, r), external input signal (input to aux2-l, r) and external forced mono. ?asssw?switches the ?vsw?output signal and external input signal (input to lpin-l, r). (7) sound processor block the sound processor block contains, ?ass/treble?tone control functions, and ?olume? bass: 12db ( 1.7db/step at 100hz) treble: 12db ( 1.7db/step at 10khz) volume: 0 to ?0db (?.25db/step) (8) others ?vca?is a vca which adjusts the input signal level to the standard level of this ic. ?ias?supplies the reference voltage and reference current to the other blocks. the current flowing to the resistor connecting iref (pin 19 (pin 16)) with gnd become the reference current. standard input and output levels 490mvrms * 2 490mvrms 490mvrms 490mvrms 17 (14) 36/35 38/37 42/41 245mvrms * 1 490mvrms 490mvrms 490mvrms 490mvrms * 2 490mvrms 490mvrms input pin pin no. input level lpout output level lsout output level * 3 compin aux1-l/aux1-r aux2-l/aux2-r lpin-l/lpin-r * 1 mono, 25khz deviation, pre-em. off * 2 mono, 25khz deviation, pre-em. on * 3 volume max, bass & treble center
? 25 cxa2074q/s vco (6) filter (6) spectral (6) wideband (6) vol-l (6) vol-r (6) **** 0000 **** 0001 **** 0010 **** 0011 **** 0100 **** 0101 **** 0110 **** 0111 **** 1000 **** 1001 **** 1010 * * * * * * * * * * * slave receiver 80h (1000 0000) slave transmitter 81h (1000 0001) register specifications slave address register table when test1 = 0 status registers data sub address msb lsb bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 test-da attsw psw test1 fst fext1 nrsw fext2 fomo tvsw sapc ext m1 m2 bass (4) treble (4) when test1 = 1 sta1 bit7 power on reset sta2 bit6 stereo sta3 bit5 sap sta4 bit4 noise sta5 bit3 sta6 bit2 sta7 bit1 sta8 bit0 sta1 bit7 power on reset sta2 bit6 stereo sta3 bit5 sap sta4 bit4 noise sta5 bit3 filadj sta6 bit2 sta7 bit1 sta8 bit0 att (4) * : don't care
? 26 cxa2074q/s description of registers control registers * 1 classification u: user control a: adjustment s: proper to set t: test att vco filter spectral wideband test-da test1 fst vol-l vol-r bass treble nrsw fomo tvsw ext fext1 fext2 psw m1 m2 attsw sapc 4 6 6 6 6 1 1 1 6 6 4 4 1 1 1 1 1 1 1 1 1 1 1 a a a a a t t t u u u u u u u u u u u u u s s input level adjustment stereo vco & sap vco free running frequency adjustment stereo and sap and dbx filter adjustment adjustment of stereo separation (3khz) adjustment of stereo separation (300hz) turn to dac test mode and vco adjustment mode by means of test-da = 1. turn to test mode by means of test = 1. (adjustment of filter) turn to forced stereo by means of fst = 1. lsout-l output signal level control lsout-r output signal level control lsout output bass control lsout output treble control selection of the output signal (stereo mode, sap mode) turn to forced mono by means of fomo = 1. (left channel only is mono during sap output.) selection of tv mode or external input mode for lpout output selection of external input 1 mode or external input 2 mode for lpout output. (tvsw = 1) external input 1 forced mono (1: forced mono on) external input 2 forced mono (1: forced mono on) selection of internal mode or lpin mode for lsout output. selection of lpout mute on/off (0: mute on, 1: mute off) selection of lsout mute on/off (0: mute on, 1: mute off) turn the input stage mvca off when attsw = 1. selection of sap mode or l + r mode according to the presence of sap broadcasting register number of bits classification * 1 contents
? 27 cxa2074q/s status registers description of control registers att (4): adjust the signal level input to compin (pin 17 (pin 14)) to the standard input level (245mvrms). variable range of the input signal: 245mvrms ?.0db to +3.0db 0 = level min. f = level max. vco (6): adjust stereo & sap vco free running frequency (fo). variable range: fo 20% 0 = free running frequency min. 3f = free running frequency max. filter (6): adjust the filter fo of the st, sap and dbx blocks. variable range: fo 20% 0 = frequency min. 3f= frequency max. spectral (6): perform high frequency (fs = 3khz) separation adjustment. 0 = level max. 3f = level min. wideband (6): perform low frequency (fs = 300hz) separation adjustment. 0 = level min. 3f = level max. test-da (1): set dac output test mode and vco adjustment mode. 0 = normal mode 1 = dac output test mode and vco adjustment mode in addition, the following outputs are present at pins 40 and 39. lpout-l (pin 40): da control dc level lpout-r (pin 39): stereo vco oscillation frequency (4f h ) ponres stereo sap noise filadj 1 1 1 1 1 power on reset detection; 1: reset stereo discrimination of the compin input signal; 1: stereo sap discrimination of the compin input signal; 1: sap noise level discrimination of the sap signal; 1: noise status of filter adjustment; 1: ok range register number of bits contents
? 28 cxa2074q/s test1 (1): set filter adjustment mode. 0 = normal mode 1 = filter (sta5) adjustment mode in addition, the following outputs are present at pins 40 and 39. lpout-l (pin 40): sap bpf out lpout-r (pin 39): nr bpf out fst (1): select forced stereo mode 0 = normal mode 1 = forced stereo mode vol-l (6): lsout-l output signal level control 0 = volume min. (?0db) 3f= volume max. (0db) ?.25 db/step vol-r (6): lsout-r output signal level control 0 = volume min. (?0db) 3f= volume max. (0db) ?.25 db/step bass (4): lsout output bass control 0 = bass min. 7 & 8 = bass center (0db) f = bass max. treble (4): lsout output treble control 0 = treble min. 7 & 8 = treble center (0db) f = treble max. nrsw (1): select stereo mode or sap mode 0 = stereo mode 1 = sap mode fomo (1): select forced mono mode 0 = normal mode 1 = forced mono mode tvsw (1): select tv mode or external input mode for lpout output. 0 = tv mode 1 = external input mode ext (1): select external input [1] mode or external input [2] mode for lpout output. (tvsw = 1) 0 = external input [1] mode 1 = external input [2] mode
? 29 cxa2074q/s fext1 (1): turn external input [1] to forced mono. 0 = normal mode 1 = external input [1] is forced mono. input the same signal to both aux1-l and aux1-r. fext2 (1): turn external input [2] to forced mono 0 = normal mode 1 = external input [2] is forced mono input the same signal to both aux2-l and aux2-r. psw (1) select int mode or lpin mode for lsout output. 0 = int mode 1 = lpin mode m1 (1): mute the lpout-l and lpout-r output. 0 = mute on 1 = mute off m2 (1): mute the lsout-l and lsout-r output. 0 = mute on 1 = mute off attsw (1) select bypass sw of mvca 0 = normal mode 1 = mvca is passed sapc (1): select the sap signal output mode when there is no sap signal, the conditions for selecting sap output are selected by sapc. 0 = l + r output is selected 1 = sap output is selected
? 30 cxa2074q/s description of mode control priority ranking: m1/m2 > tvsw/ext > test-da > test1 > (nrsw & fomo & sapc) nrsw fomo sapc m1/m2 tvsw/ext test1 test-da ?elect dbx input and tv decoder output conditions: fomo = 0 nrsw = 0 (mono or st output) during st input: left channel: l, right channel: r during other input: left channel: l + r, right channel: l + r nrsw = 1 (sap output) when there is ?ap?during sap discrimination ?left channel: sap, right channel: sap when there is ?o sap? output is the same as when nrsw = 0. ?elect dbx input and tv decoder output conditions: fomo = 0 nrsw = 0 (mono or st output) as on the left nrsw = 1 (sap output) regardless of the presence of sap discrimination, dbx input: ?ap left channel: sap, right channel: sap however, when there is no sap, sapout output is soft muted (?db) mode control sapc = 0 sapc = 1 ?orced mono fomo = 1 during sap output: left channel: l + r, right channel: sap during st or mono output: left channel: l + r, right channel: l + r change the selection conditions for ?ono or st output?and ?ap output? sapc = 0: switch to sap output when there is sap discrimination. do not switch to sap output when there is no sap discrimination. sapc = 1: switch to sap output regardless of whether there is sap discrimination. ?ute m1 = 0: lpout output is muted. m2 = 0: lsout output is muted. ?v mode/external input mode selection tvsw = 0: set lpout output to tv mode. tvsw = 1: set lpout output to external input mode. ext = 0: set lpout output to external input [1] mode. (tvsw = 1) ext = 1: set lpout output to external input [2] mode. (tvsw = 1) ?est1 test1 = 1 return adjustment data with status register as an adjustment mode. in addition, outputs are as follows. left channel: sap bpf out right channel: nr bpf out ?est-da test-da = 1 used to adjust the d/a test and vco. left channel: d/a output right channel: stvco oscillation frequency (4f h )
? 31 cxa2074q/s decoder output and mode control table 1 (sapc = 1) note (sap) : the sapout output signal is soft muted (approximately ?db). the signal is soft muted when noise = 1. * : don? care. * 1 sap or noise discrimination may be made during mono or stereo input when the noise is inputted in the weak electric field. "noise" status rises earlier than "sap" status when the amount of noise is increased to compin. 0 0 0 0 * 1 mute l + r l + r 0 0 0 1 0 1 sap sap sap mono 0 0 0 1 1 1 sap l + r sap 0 * 1 0 * 1 mute l + r l + r 0 * 1 1 0 1 (sap) (sap) (sap) 0 * 1 1 1 1 (sap) l + r (sap) 1 0 * 0 0 1 l ?r l r 1 0 * 0 1 1 mute l + r l + r 1 1 1 0 0 1 l ?r l r stereo 1 1 1 0 1 1 mute l + r l + r 1 0 0 1 0 1 sap sap sap 1 0 0 1 1 1 sap l + r sap 1 * 1 1 0 1 (sap) (sap) (sap) 1 * 1 1 1 1 (sap) l + r (sap) 0 1 * 0 0 1 mute l + r l + r 0 1 * 0 1 1 mute l + r l + r mono & sap 0 1 0 1 0 1 sap sap sap 0 1 0 1 1 1 sap l + r sap 0 1 1 1 0 1 (sap) (sap) (sap) 0 1 1 1 1 1 (sap) l + r (sap) 1 1 * 0 0 1 l ?r l r 1 1 * 0 1 1 mute l + r l + r stereo & sap 1 1 0 1 0 1 sap sap sap 1 1 0 1 1 1 sap l + r sap 1 1 1 1 0 1 (sap) (sap) (sap) 1 1 1 1 1 1 (sap) l + r (sap) input signal mode mode detection mode control dbx input output st sap noise nrsw fomo sapc lch rch * 1 * 1
? 32 cxa2074q/s decoder output and mode control table 2 (sapc = 0) note (sap) : the sapout output signal is soft muted (approximately ?db). the signal is soft muted when noise = 1. * : don? care. * 1 sap or noise discrimination may be made during mono or stereo input when the noise is inputted in the weak electric field. "noise" status rises earlier than "sap" status when the amount of noise is increased to compin. 0 0 * * * 0 mute l + r l + r 0 1 1 0 0 0 mute l + r l + r mono 0 1 1 0 1 0 mute l + r l + r 0 1 1 1 0 0 (sap) (sap) (sap) 0 1 1 1 1 0 (sap) l + r (sap) 1 0 * 0 0 0 l ?r l r 1 0 * 0 1 0 mute l + r l + r 1 0 * 1 0 0 l ?r l r stereo 1 0 * 1 1 0 mute l + r l + r 1 1 1 0 0 0 l ?r l r 1 1 1 0 1 0 mute l + r l + r 1 1 1 1 0 0 (sap) (sap) (sap) 1 1 1 1 1 0 (sap) l + r (sap) 0 1 0 0 0 0 mute l + r l + r 0 1 0 0 1 0 mute l + r l + r 0 1 0 1 0 0 sap sap sap mono & sap 0 1 0 1 1 0 sap l + r sap 0 1 1 0 0 0 mute l + r l + r 0 1 1 0 1 0 mute l + r l + r 0 1 1 1 0 0 (sap) (sap) (sap) 0 1 1 1 1 0 (sap) l + r (sap) 1 1 0 0 0 0 l ?r l r 1 1 0 0 1 0 mute l + r l + r 1 1 0 1 0 0 sap sap sap stereo & sap 1 1 0 1 1 0 sap l + r sap 1 1 1 0 0 0 l ?r l r 1 1 1 0 1 0 mute l + r l + r 1 1 1 1 0 0 (sap) (sap) (sap) 1 1 1 1 1 0 (sap) l + r (sap) input signal mode mode detection mode control dbx input output st sap noise nrsw fomo sapc lch rch * 1 * 1
mode control table 3 tv (l) / tv (r) are selected in matrix tv (l): mono, st-l, sap, (sapbpfout, d/aout) tv (r): mono, st-r, sap, (nrbpfout, stvco freerun (4f h )) i 2 c bus signal there are two i 2 c signals, sda (serial data) and scl (serial clock) signals. sda is a bidirectional signal. accordingly there are 3 values outputs, h, l and hiz. i 2 c transfer begins with start condition and ends with stop condition. ? 33 cxa2074q/s tvsw 0 1 1 1 1 s d a s c l s t a r t c o n d i t i o n s s t o p c o n d i t i o n p fext2 0 1 fext1 0 1 ext 0 0 1 1 m1 0 1 1 1 1 1 1 2 3 4 5 6 lpout-l mute tv (l) aux1-l aux1-l aux2-l aux2-l lpout-r mute tv (r) aux1-r aux1-l aux2-r aux2-l h l h i z l
? 34 cxa2074q/s i 2 c data write (write from i 2 c controller to the ic) * data can be transferred in 8-bit units to be set as required. sub address is incremented automatically. i 2 c data read (read from the ic to i 2 c controller) read timing * data read is performed during scl rise. s a d d r e s s 1 6 7 8 9 1 8 9 s c l a c k d a t a a c k s d a h d u r i n g r e a d h i z 7 p d a t a 1 2 3 4 5 6 7 8 9 9 i c o u t p u t s d a s c l m s b l s b a c k a c k r e a d t i m i n g a c k a c k d a t a d a t a p 8 9 1 8 9 h i z h i z d a t a ( n ) d a t a ( n + 1 ) a c k 1 8 9 1 8 9 a c k d a t a ( n + 2 ) h i z h i z l s b m s b s a d d r e s s 1 2 3 4 5 6 7 8 9 1 8 9 s d a s c l m s b l d u r i n g w r i t e m s b l s b h i z h i z a c k s u b a d d r e s s a c k
? 35 cxa2074q/s i n p u t l e v e l v s . d i s t o r t i o n c h a r a c t e r i s t i c s 1 ( m o n o ) d i s t o r t i o n [ % ] 1 . 0 0 . 1 1 0 0 1 0 i n p u t l e v e l v s . d i s t o r t i o n c h a r a c t e r i s t i c s 2 ( s t e r e o ) d i s t o r t i o n [ % ] 1 0 1 . 0 1 0 0 1 0 i n p u t l e v e l [ d b ] i n p u t s i g n a l : s t e r e o l = r ( d b x - t v n r o n ) , 1 k h z 0 d b = 1 0 0 % m o d u l a t i o n l e v e l v c c = 9 v , 3 0 k h z u s i n g l p f , s t m o d e m e a s u r e m e n t p o i n t : l p o u t - l / r i n p u t l e v e l v s . d i s t o r t i o n c h a r a c t e r i s t i c s 3 ( s a p ) d i s t o r t i o n [ % ] 1 0 1 . 0 1 0 0 1 0 i n p u t l e v e l [ d b ] i n p u t l e v e l [ d b ] s t a n d a r d l e v e l ( 1 0 0 % ) s t a n d a r d l e v e l ( 1 0 0 % ) i n p u t s i g n a l : s a p ( d b x - t v n r o n ) 1 k h z , 0 d b = 1 0 0 % m o d u l a t i o n l e v e l v c c = 9 v , 3 0 k h z u s i n g l p f , s a p m o d e m e a s u r e m e n t p o i n t : l p o u t - l / r s t a n d a r d l e v e l ( 1 0 0 % ) i n p u t s i g n a l : m o n o ( p r e - e m p h a s i s o n ) , 1 k h z 0 d b = 1 0 0 % m o d u l a t i o n l e v e l v c c = 9 v , 3 0 k h z u s i n g l p f m e a s u r e m e n t p o i n t : l p o u t - l / r
? 36 cxa2074q/s f r e q u e n c y [ k h z ] g a i n [ d b ] s t e r e o l p f f r e q u e n c y c h a r a c t e r i s t i c s 1 0 5 0 5 1 0 0 2 0 4 0 6 0 8 0 1 0 0 3 0 1 0 0 2 0 5 0 1 2 5 1 0 2 0 5 0 7 7 0 1 0 0 4 0 3 0 1 0 2 0 g a i n ( f c m a i n a n d f c s u b ) [ d b ] 1 0 0 2 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 0 2 0 s a p f r e q u e n c y c h a r a c t e r i s t i c s a n d g r o u p d e l a y g r o u p d e l a y [ s ] 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 1 0 2 0 0 3 0 5 f h g a i n g r o u p d e l a y 3 . 8 f h 6 . 2 f h f r e q u e n c y [ k h z ] f r e q u e n c y [ k h z ] m a i n l p f a n d s u b l p f f r e q u e n c y c h a r a c t e r i s t i c s g a i n [ d b ]
? 37 cxa2074q/s 2 0 1 0 0 1 k f r e q u e n c y [ h z ] 1 0 k 2 0 k i n p u t : a u x 1 , 2 2 4 5 m v r m s o u t p u t : l s o u t t r e b l e . m i n b a s s . m i n b a s s . m a x t r e b l e . m a x + 1 2 + 8 + 4 0 4 8 1 2 b o o s t a m o u n t [ d b ] b a s s - t r e b l e c h a r a c t e r i s t i c s 0 f 1 f c o n t r o l d a t a v o l - l , v o l - r 2 f 3 f i n p u t : a u x 1 , 2 1 k h z , 4 9 0 m v r m s o u t p u t : l s o u t 0 2 0 4 0 6 0 8 0 1 0 0 l s o u t o u t p u t l e v e l [ d b ] v o l u m e c h a r a c t e r i s t i c s
? 38 cxa2074q/s package outline unit: mm cxa2074q 4 2 p i n s d i p ( p l a s t i c ) 6 0 0 m i l 3 7 . 8 + 0 . 4 0 . 1 1 3 . 0 + 0 . 3 0 . 1 0 . 2 5 + 0 . 1 0 . 0 5 4 2 2 2 1 2 1 1 . 7 7 8 0 . 2 5 1 5 . 2 4 0 . 2 5 0 t o 1 5 4 . 6 + 0 . 4 0 . 1 0 . 5 0 . 1 0 . 9 0 . 1 5 3 . 0 m i n 0 . 5 m i n s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t e p o x y r e s i n s o l d e r p l a t i n g c o p p e r / 4 2 a l l o y s d i p - 4 2 p - 0 2 s d i p 0 4 2 - p - 0 6 0 0 - a 4 . 4 g s o n y c o d e e i a j c o d e j e d e c c o d e m p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t e p o x y r e s i n s o l d e r / p a l l a d i u m p l a t i n g c o p p e r / 4 2 a l l o y 4 8 p i n q f p ( p l a s t i c ) 1 5 . 3 0 . 4 1 2 . 0 0 . 1 + 0 . 4 0 . 8 0 . 3 0 . 1 + 0 . 1 5 0 . 1 2 1 3 2 4 2 5 3 6 3 7 4 8 1 1 2 2 . 2 0 . 1 5 + 0 . 3 5 0 . 9 0 . 2 0 . 1 0 . 1 + 0 . 2 1 3 . 5 0 . 1 5 0 . 1 5 0 . 0 5 + 0 . 1 q f p - 4 8 p - l 0 4 * q f p 0 4 8 - p - 1 2 1 2 - b 0 . 7 g cxa2074s

▲Up To Search▲

Price & Availability of CXA2074QS

	To Download CXA2074QS Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .